1. Field of the Invention
The present invention relates to a sine wave generating circuit for use in the fields of communication, audible signal and the like.
2. Description of the Background Art
FIG. 8 is a circuit diagram of a conventional sine wave generating circuit. A 5-bit counter 1 counts clocks CLK to apply count results B0 to B4 to a ROM 2 in the form of addresses A0 to A4. The ROM 2 prestores 4-bit data which approximate a sine wave, and outputs 4-bit data D0 to D3 specified by the addresses A0 to A4. A 4-bit flip-flop 3 transforms the data D0 to D3 into signals Q0 to Q3, which are inputted to a D/A converter 4. The D/A converter 4 outputs an analog voltage. A low pass filter 5 suppresses high-frequency noises in the analog voltage. That is, the 4-bit data, which are stored in the ROM 2 and approximate the sine wave, are sequentially read out in response to the clocks CLK and are digital-to-analog converted to generate the sine wave through the low pass filter 5.
The conventional sine wave generating circuit, however, outputs only waveforms having quantization errors as against an ideal sine wave because the data D0 to D3 which approximate the sine wave are a 4-bit signal. The open circles of FIG. 9 indicate outputs of the D/A converter 4 in response to the clock CLK. Assuming that a maximum absolute value of the outputs is one, the outputs are, if arranged in an ascending order, -1, -15/16, -13/16, -11/16, -9/16, -6/16, -3/16, 0, 3/16, 6/16, 9/16, 11/16, 13/16, 15/16, 1. The closed circles of FIG. 9 indicate ideal values for the sine wave sin(k.pi./16) (k is an integer) in response to the clock CLK in corresponding relation to the open circles. The solid lines of FIG. 9 connect the adjacent closed circles.
The output waveform of the filter 5 of FIG. 8 has a large distortion factor due to the quantization errors. To reduce the distortion factor, the number of bits in data for circuits should be increased. For this purpose, the counter 1, ROM 2 and D/A converter 4 must be capable of dealing with a large number of bits. It is also necessary to increase the order of the low pass filter 5. The increasing size of the whole circuitry has been a problem.
When the data are outputted from the D/A converter 4 at a higher frequency in response to the clock CLK outputted at shorter intervals, the high frequency is not appropriately suppressed because of the fixed characteristics of the low pass filter. As a result, another problem arises that a variable frequency of the sine wave to be generated is not achieved.